Intel Core i9 (Gulftown) - 6 cores, 32 nm: hands-on review 

As per Intel's request, this article has not been available for some time. It has been restored on Gulftown release day.

The Westmere processor family and the 32 nm process technology

Our readers probably remember Intel's technology roadmap for the coming months presented in our "manic essentials toolkit". Let us have a look back at that processor "roadmap":

The Intel processors currently available on the market are members of two families: Nehalem and Penryn, and all are made using the 45-nanometer process technology. The Nehalem processors are Core i7 for the LGA 1366 socket (codename: Bloomfield), Core i7 and Core i5 for the LGA1156 socket (codename: Lynnfield) as well as the laptop-dedicated Core i7 (codename: Clarksfield). Later this year and early next year, Intel plans to launch the Westmere processor family. The Westmere codename stands for all circuits, which, based on the Tick-Tock strategy, will be manufactured using the same architecture as Nehalem, but using 32 nanometer processing. The first ones to land in the stores will probably be the Clarkdale processors - dual-core systems with integrated graphics cores designed for the LGA1156 socket. With time, the Westmere family will grow in view of the advent of laptop-dedicated dual-cores with integrated graphics – the Arrandale and Gulftown processors. And it is none other than the Gulftown that is the central figure of today's article.

The Gulftown core

Like Conroe (Core 2 Duo 65 nm) and Penryn (Core 2 Duo 45 nm), Gulftown has a whole lot in common with Bloomfield. In short, we can say that the Bloomfield has been given two cores and some third-level cache love. The capacity ratio of the L3 cache to the number of cores remains the same: Bloomfield has 4 cores and 8 MB of L3, Gulftown has 6 cores and 12MB of L3. The L1D, L1C and L2 cache capacity remains unchanged. Also unchanged is the processor's “make-up” - in addition to six cores in a single block of silicon there is a block of L3 cache, a triple-channel memory controller and two QPI links. One of them is used to communicate with the IOH system and with the rest of the system (X58 desktop chipset or 5520 server chipset). The other one is used for communication with the second processor on dual-processor machines, and it will be disabled in the desktop and workstation version (similar to Core i7-900 and Xeon W35x0). Intel has not yet shown a silicon wafer with the Gulftown cores or the processor itself with the core uncovered. According to unofficial sources, its size should be approximately 21.1 × 11.4 mm. The core surface area is probably around 240 mm2, i.e. about 10% less than the Bloomfield core (263 mm 2). This means that if the yield on Intel's 32-nanometer process technology is as good as that on 45-nanometer technology, the manufacturing cost of a single Gulftown is less than that of a Bloomfield. But let us not count on Intel's six core price tag to be low. Firstly, Intel's throughput in the 45-nanometer process is much higher – only one plant (D1D in Oregon) is ready to produce 32 nm circuits. Another three are being converted. Meanwhile, 45-nm systems are produced in three facilities. In addition, the Gulftown prices will be tailored to their target consumers – prepare to spend about 1,000-1,200 dollars for the desktop version. We still do not know what commercial name the Gulftowns will be given – various sources report it to be i9 Core or Core i7-1000 series.

Microarchitecture changes

It is true that the Tick-Tock strategy implies a change in the microarchitecture and updating the technology process, but when changing processes, Intel also makes certain improvements in the core logic. A good example of this was the Penryn processor family – although built based on the Conroe architecture, they featured such improvements as a faster division algorithm and SSE4.1 instructions. The most important and most publicized change to the Westmere compared to the Nehalem is a new AES-NI set of instructions (Advanced Encryption Standard – New Instructions). There are seven new instructions, six of which have been designed specifically to accelerate AES encryption. Encryption using this algorithm requires keys to be generated first, which is performed by the AESKEYGENASSIST instruction. The AESENC and AESENCLAST instructions perform further encryption steps, while AESDEC and AECDECLAST do the decryption. The AESIMC instruction makes decryption key generation faster. The last PCLMULQDQ instruction (carry-less multiplication of two 64-bit operands) is not directly associated with the AES algorithm, but also speeds up the encryption process. Details of the AES-NI instructions and the AES encryption algorithm can be found on an Intel website dedicated to this subject. Similar hardware-based encryption mechanisms were applied long ago now by VIA in their C3 and Nano processors. The AES-NI and PCLMULQDQ instructions will also be implemented on all Westmere processors, including the desktop Arrandale and the laptop Clarkdale. They are also to be implemented in AMD’s future processor architecture (codename: Bulldozer).

The second of the changes relevant to users is the change in the operation of the memory controller. As in the Lynnfield processors (Core i5 and Core i7-800), the 1 uncore timing part memory clock speed limit does not apply any more. While the uncore in a Bloomfield has to work with a 4000 MHz frequency so that the memory can reach a clock speed of 1000 MHz (DDR3-2000), three times the memory clock is enough for the Gulftows and the Lynnfields. In our test item, the uncore operation frequency was 2400 MHz and could not be changed due to early BIOS versions. Intel has not confirmed yet whether the Gulftown processors will provide official support for memories faster than DDR3-1333, but it can be expected that with one module per memory channel, the fastest official speed will be DDR3-1600.